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Semiconductor Industry Daily News & Updates

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Semiconductor Industry Daily News & Updates

  • The growing demand for high-performance AI applications continues to drive innovation in CPU architecture design. As machine learning workloads, particularly convolutional neural networks (CNNs), become more computationally intensive, architects face the challenge of delivering performance improvements while maintaining… Read More The post Webinar: Unlocking Next-Generation Performance for CNNs on RISC-V CPUs appeared first on SemiWiki.
  • As RISC-V gains traction in the global semiconductor industry, developers are exploring fully open-source approaches to processor design. XiangShan, a high-performance RISC-V CPU project, combined with the Mulan Permissive License v2 (Mulan PSL v2), represents a community-driven, transparent alternative to proprietary… Read More The post An Open-Source Approach to Developing a RISC-V Chip with XiangShan […]
  • Anna Fontanelli, CEO of MZ Technologies, is a silicon executive with more than 35 years of expertise in managing complex R&D organizations/programs to give birth to innovative EDA technologies. Strong communication skills and proven ability to lead distributed, cross functional teams in international environments.… Read More The post 2025 Outlook Anna Fontanelli MZ Technologies appeared […]
  • The semiconductor industry is facing a paradigm shift. Traditional scaling, once driven by Moore’s Law, is slowing down. For years, moving to smaller process nodes led to lower transistor costs and better performance. However, scaling from node to node now offers fewer benefits as wafer costs rise much more than the historical… Read More The […]
  • Justin Susumu Endo, Mixel’s Director of Marketing & Sales, oversees marketing strategy and customer engagement from Mixel’s headquarters in San Jose, California. He holds a bachelor’s degree with a double major in economics and French from the University of California, Los Angeles, and an MBA from … Read More The post 2025 Outlook with Justin […]
  • Compression enables the creation of a new memory tier that balances performance and cost. The post Optimizing Data Center TCO With CXL And Compression appeared first on Semiconductor Engineering.
  • Chiplet design engineers have complex new considerations compared to PCB concepts. The post Signal Integrity Plays Increasingly Critical Role In Chiplet Design appeared first on Semiconductor Engineering.
  • Simulation process data management is the cornerstone for implementing and optimizing the digital thread. The post How SPDM Can Drive Digital Transformation appeared first on Semiconductor Engineering.
  • It’s mostly for data scientists, but not always. The post Normalization Keeps AI Numbers In Check appeared first on Semiconductor Engineering.
  • Automatic load balancing for multi-threaded embedded applications in a multicore environment. The post Symmetric Multiprocessing (SMP) RTOS On Xtensa Multicore appeared first on Semiconductor Engineering.
  • How to detect hard-to-find leakage issues across power domains. The post Beyond Simulation: Transforming Early IC Design With Insight Analyzer appeared first on Semiconductor Engineering.
  • Enabling devices to perceive and interpret their surroundings in a more sophisticated manner. The post Building Vision-Enabled Devices To Capture The Emerging Wave In IoT appeared first on Semiconductor Engineering.
  • The chip industry's new buzzword comes with lots of implications and some vague definitions. The post What Exactly Is Multi-Physics? appeared first on Semiconductor Engineering.
  • A new technical paper titled “Exploring Uncore Frequency Scaling for Heterogeneous Computing” was published by researchers at University of Illinois Chicago and Argonne National Laboratory. Abstract “High-performance computing (HPC) systems are essential for scientific discovery and engineering innovation. However, their growing power demands pose significant challenges, particularly as systems scale to the exascale level. Prior… […]
  • A new technical paper titled “Simulation of Vertically Stacked 2-D Nanosheet FETs” was published by researchers at Università di Pisa and TU Wien. Abstract “We present a simulation study of vertically stacked 2-D nanosheet field-effect transistors (NSFETs). The aim of this investigation is to assess the performance and potential of FinFET alternatives, i.e., gate-all-around (GAA)… […]
  • For its fiscal third-quarter 2025 (ended 28 December 2024), Qorvo Inc of Greensboro, NC, USA (which provides core technologies and RF solutions for mobile, infrastructure and defense applications) has reported revenue of $916.3m, down 12.4% on $1046.5m last quarter and 14.7% on $1073.9m a year ago, albeit slightly above the midpoint of the $900m±$25m guidance…
  • Sivers Semiconductors AB of Kista, Sweden (which supplies RF beam-former ICs for SATCOMs and photonic lasers for AI data centers) has signed a strategic memorandum of understanding (MOU) with an optical infrastructure firm for large-scale AI workloads for the volume production of high-performance laser arrays…
  • Infineon Technologies AG of Munich, Germany says that it has made significant progress on its 200mm silicon carbide (SiC) roadmap, and is releasing the first products based on the 200mm SiC technology to customers in first-quarter 2025. Manufactured in Villach, Austria, the products provide SiC power technology for high-voltage applications, including renewable energies, trains, and […]
  • Epiwafer and substrate maker IQE plc of Cardiff, Wales, UK says that, further to its announcement of 18 November 2024, it has entered into subscription agreements with a consortium of existing investors and certain senior executives and directors, led by its largest shareholder Lombard Odier…
  • To support the electronics industry’s shift towards more compact and powerful systems and to further drive innovation at the system level, Infineon Technologies AG of Munich, Germany is expanding its portfolio of discrete CoolSiC MOSFETs 650V with two new product families housed in Q-DPAK and TOLL packages…
  • Fabless firm Cambridge GaN Devices Ltd (CGD) — which was spun out of the University of Cambridge in 2016 to design, develop and commercialize power transistors and ICs that use GaN-on-silicon substrates — says that Henryk Dabrowski, appointed as senior VP of global sales last year, will lead its global sales strategy by expanding into […]
  • Power Integrations Inc of San Jose, CA, USA (which provides high-voltage integrated circuits for energy-efficient power conversion) says that Gregg Lowe is joining its board of directors on 15 February…
  • Power Integrations Inc of San Jose, CA, USA (which provides high-voltage integrated circuits for energy-efficient power conversion) says that Balu Balakrishnan, CEO since 2002, is retiring from that role once a successor is in place. The board of directors has retained an executive search firm to assist in identifying its next CEO. Balakrishnan, 70, intends […]
  • At Photonics West 2025 in San Francisco (25–30 January), micro/nanotechnology R&D center CEA-Leti of Grenoble, France presented three papers detailing its latest improvements to chemical detection, high-speed communication and LiDAR performance with integrated optics on silicon…
  • Sweden-based AlixLabs AB (which was spun off from Lund University in 2019) has used its Atomic Layer Etching (ALE) Pitch Splitting technology (APS) technology to etch structures corresponding to commercial 3nm semiconductor processes on test silicon provided by Intel. The results will be shared in full by chief technology officer & co-founder Dmitry Suyatin at […]